From fc34707ae1fb8801e18421645e87017f6fd9cbfe Mon Sep 17 00:00:00 2001 From: Julien Grall Date: Wed, 21 Sep 2016 15:52:12 +0100 Subject: [PATCH] xen/arm64: Add missing synchronization barrier in invalidate_cache The invalidation of the instructions cache requires barriers to ensure the completion of the invalidation before continuing (see B2.3.4 in ARM DDI 0487A.j). This was overlooked in commit fb9d877 "xen/arm64: Add an helper to invalidate all instruction caches". Signed-off-by: Julien Grall Reviewed-by: Konrad Rzeszutek Wilk Reviewed-by: Stefano Stabellini --- xen/include/asm-arm/arm64/page.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/include/asm-arm/arm64/page.h b/xen/include/asm-arm/arm64/page.h index 79ef7bddb5..23d778154d 100644 --- a/xen/include/asm-arm/arm64/page.h +++ b/xen/include/asm-arm/arm64/page.h @@ -33,6 +33,8 @@ static inline void write_pte(lpae_t *p, lpae_t pte) static inline void invalidate_icache(void) { asm volatile ("ic ialluis"); + dsb(ish); /* Ensure completion of the flush I-cache */ + isb(); } /* -- 2.30.2